CMOS VTC Simulator | Inverter Voltage Transfer Curve

Supply Voltage (V_DD) 5.0 V

NMOS Threshold (V_tn) 1.0 V

PMOS Threshold (|V_tp|) 1.0 V

Drive Ratio (k_r = k_n/k_p) 1.0

Transient Input Signal

Operating Point (V_in) 2.50 V

NMOS State

Cutoff

VTC Region

Region A

Switching Threshold (V_M) = 2.50 V

PMOS State

Linear

Voltage Transfer Characteristic (VTC)

Transient Response (Time Domain)

The Mathematics of Region C (The Vertical Drop)

In an ideal CMOS inverter (ignoring channel-length modulation, λ = 0), Region C occurs exactly at the switching threshold, where V_in = V_M. At this exact voltage, both the NMOS and PMOS transistors are operating in Saturation.

Because ideal saturation current is completely independent of V_out, the drain currents balance perfectly. This causes the output voltage to instantly drop across the entire bounds of the saturation region without requiring any change in V_in. This forms a perfectly vertical line with infinite gain.

Upper Bound (PMOS leaves sat.)

V_{out, max} = V_M + |V_tp|

3.50 V

Switching Threshold

V_in = V_M

2.50 V

Lower Bound (NMOS leaves sat.)

V_{out, min} = V_M - V_tn

1.50 V